The present invention relates to semiconductor devices, and more particularly, to complementary metal-oxide-semiconductor (CMOS) devices including high-k metal gate structures.
Field effect transistors (FETs) are widely used in the electronics industry for switching, amplification, filtering, and other tasks related to both analog and digital electrical signals. Most common among these are metal-oxide-semiconductor field-effect transistors (MOSFET or MOS), in which a gate structure is energized to create an electric field in an underlying channel region of a semiconductor body, by which electrons are allowed to travel through the channel between a source region and a drain region of the semiconductor body. Complementary MOS (CMOS) devices have become widely used in the semiconductor industry, wherein both n-type and p-type (NMOS and PMOS) transistors are used to fabricate logic and other circuitry.
As the scaling of CMOS devices continues to decrease, variability in threshold voltage (Vt) of the device becomes more prevalent. For instance, CMOS devices typically implement high-k metal gate structures that include one or more work function metal layers. The work function metal layers have a natural granularity typically referred to as metal grain granularity (MGG). The orientation of the each grain, however, affects the work function of the metal layers thereby causing variations in the overall Vt of the device. In addition, the high-k material forming the gate dielectric layer can include a distribution of positively charged oxygen vacancies which contribute to random variations in the Vt of the device.